Major Arm licensee adopts royalty-free RISC-V core for next-gen processors



The RISC-V open-standard instruction set architecture (ISA) has become quite a phenomenon in the recent years as multiple companies that traditionally use Arm’s ISA or processor cores decided to join the emerging ecosystem. Renesas Electronics has now announced that it will use a 32-bit RISC-V core designed by Andes Technology for its upcoming application-specific standard products (ASSPs). 

Renesas’s pre-programmed ASSPs based on the AndesCore IP 32-bit RISC-V cores will come with specialized user interface tools to set application parameters and will eliminate the initial RISC-V development and software investment barrier for companies that have no experience with the ISA. This will greatly simplify deployment of such chips that will begin sampling in the second half of 2021.  


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